Package | Description |
---|---|
builder.resid.residfp |
Class and Description |
---|
EnvelopeGenerator
A 15 bit counter is used to implement the envelope rates, in effect dividing
the clock to the envelope counter by the currently selected rate period.
|
Filter
The SID filter is modeled with a two-integrator-loop biquadratic filter,
which has been confirmed by Bob Yannes to be the actual circuit used in the
SID chip.
|
Filter6581 |
Filter8580 |
ReSIDfp
Antti S.
|
Voice |
WaveformGenerator
A 24 bit accumulator is the basis for waveform generation.
|
Copyright © 2018 Ken Händel. All rights reserved.